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          EEPW首頁(yè) > 測(cè)試測(cè)量 > 新品快遞 > 創(chuàng)景推出 ERC32 開(kāi)發(fā)完整的解決方案

          創(chuàng)景推出 ERC32 開(kāi)發(fā)完整的解決方案

          作者: 時(shí)間:2005-04-04 來(lái)源:電子產(chǎn)品世界 收藏

              ERC32 CPU (Atmel TSC695) 是一顆高可靠性,高性能,具有容錯(cuò),抗輻射功能的32位 RISC結(jié)構(gòu)的CPU,在國(guó)外,主要是用在航天等領(lǐng)域。

              公司依靠強(qiáng)大的技術(shù)實(shí)力,投入大量的人力與物力,開(kāi)發(fā)出了ERC32的全套解決方案:ERC32 評(píng)估板;ERC32實(shí)時(shí)仿真器;ERC32實(shí)時(shí)故障注入器;ERC32軟件測(cè)試等一整套的產(chǎn)品:

              1). ERC32 評(píng)估板:ERC32 CPU + FLASH + SRAM + RS232 + LED + Key + Ethernet + RTMES(RTOS BSP) + vxworks BSP

              2).ERC32實(shí)時(shí)仿真器: 網(wǎng)口,高速下載,支持GDB, Eclips debugger, 上海的ERC32 VDS IDE (EDIT + Compiler + Debugger), real time trace, flash programming, JTAG 接口

              3).ERC32 實(shí)時(shí)故障注入器:實(shí)時(shí)注入各種故障:如register error, memory error, pin error...

              4).ERC32軟件(Firmware)實(shí)時(shí)測(cè)試儀: code coverage, Software performance analyse, variable monitor, stack overflow monitor

          About ERC32 (TSC695)

          The TSC695F (ERC32 Single-Chip) is a highly integrated, high-performance 32-bit RISC embedded processor implementing the SPARC architecture V7 specification. It has been developed with the support of the ESA (European Space Agency), and offers a full development environment for embedded space applications.

          The TSC695 includes all the major features (except co-processor implementation and master/checker mode) of the ERC32 chip-set. The component can divided in five blocks:

          • the IU based on SPARC V7.0 architecture,

          • the FPU compliant to ANSI/IEEE 754 standard,

          • a specific memory controller,

          • a slave DMA arbiter,

          • seven peripherals:

          – 1 watchdog (or NMI),

          – 2 timers,

          – 1 interrupt controller,

          – 1 GPI,

          – 2 UART’s,

          網(wǎng)線測(cè)試儀相關(guān)文章:網(wǎng)線測(cè)試儀原理


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