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class="authorTimeSource"> <span>作者：</span> <span>時(shí)間：2023-07-10</span> <span>來源：東芝</span> <link rel="stylesheet" type="text/css"/> <span style="float:right; width:150px;margin-right:0px; text-align:right;"> <div id="wiigddz" class="nav0"> <ul> <li style="width:150px;"><a href="javascript:void(0);"><img src="http://cafeforensic.com/event/action/images/icon_add_4.png" width="20" border="0" align="absmiddle" />英飛凌汽車電子生態(tài)圈</a> <ul> <li style="width:150px;text-align:center;"><img src="http://cafeforensic.com/event/company/images/code_2.jpg" width="150"><br />掃碼關(guān)注<br />獲取最新最全汽車電子<br />技術(shù)方案與實(shí)用技巧</li> </ul> </li> </ul> </div> </span> <span style="float:right; width:30px;margin-right:0px; text-align:right;"><a rel="nofollow">收藏</a></span> </div> <div id="6616661" class="hAd4_Afinal20a_back">  <iframe id='a890e388' name='a890e388' src='https://ad.eepw.com.cn/www/delivery/afr.php?zoneid=88&cb=INSERT_RANDOM_NUMBER_HERE' frameborder='0' scrolling='no' width='660' height='60'><a target='_blank'><img src='https://ad.eepw.com.cn/www/delivery/avw.php?zoneid=88&cb=INSERT_RANDOM_NUMBER_HERE&n=a635e61e' border='0' alt='' /></a></iframe> </div> <div style="margin-top:28px;"></div> <div id="1116116" class="content" id="contentDiv" style="position:relative;"> <div id="1611661" class="ad_300x180_Afinal13_back">  <iframe id='a225770a' name='a225770a' src='https://ad.eepw.com.cn/www/delivery/afr.php?zoneid=87&cb=INSERT_RANDOM_NUMBER_HERE' frameborder='0' scrolling='no' width='300' height='200'><a target='_blank'><img src='https://ad.eepw.com.cn/www/delivery/avw.php?zoneid=87&cb=INSERT_RANDOM_NUMBER_HERE&n=a576c0a2' border='0' alt='' /></a></iframe> </div> <span id="contentlabels" style="font-size:14px;"><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">在上一期的芝識(shí)課堂中，我們和大家一起了解了<a class="contentlabel" href="http://cafeforensic.com/news/listbylabel/label/CMOS"><em>CMOS</em></a>邏輯IC可以分為組合邏輯和時(shí)序邏輯，并以幾種典型電路單元的對(duì)應(yīng)邏輯關(guān)系詳細(xì)解讀了組合邏輯電路的原理。這一期芝識(shí)課堂中，我們將繼續(xù)和大家分享<a class="contentlabel" href="http://cafeforensic.com/news/listbylabel/label/CMOS"><em>CMOS</em></a>邏輯IC的基礎(chǔ)知識(shí)，并通過實(shí)際電路單元來幫助大家分析組合邏輯和時(shí)序邏輯中各自所對(duì)應(yīng)的輸入和輸出之間暗藏的邏輯關(guān)系。</p>本文引用地址：<a href="http://cafeforensic.com/article/202307/448463.htm">http://cafeforensic.com/article/202307/448463.htm</a><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">多路復(fù)用器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">多路復(fù)用器也是一種典型的組合邏輯電路，比如<a class="contentlabel" href="http://cafeforensic.com/news/listbylabel/label/東芝"><em>東芝</em></a>的74VHC157和74VHC153，多路復(fù)用器將從多個(gè)輸入信號(hào)中選擇一個(gè)信號(hào)并將其轉(zhuǎn)發(fā)到單個(gè)輸出線。圖1所示的時(shí)序圖顯示了如何從兩個(gè)輸入中選擇一個(gè)信號(hào)。當(dāng)選擇引腳為低電平（0）時(shí)，信號(hào)從A引腳轉(zhuǎn)發(fā)到Y(jié)引腳。當(dāng)選擇引腳為高電平（1）時(shí)，信號(hào)從B引腳轉(zhuǎn)發(fā)到Y(jié)引腳。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550680..jpg" title="1688550680263835.jpg" alt="24.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖1 2對(duì)1多路復(fù)用器的時(shí)序圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">模擬多路復(fù)用器／解復(fù)用器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">與多路復(fù)用器類似，模擬多路復(fù)用器／解復(fù)用器作為組合邏輯電路，包含模擬開關(guān)，以從多個(gè)模擬輸入中選擇一個(gè)信號(hào)并將其轉(zhuǎn)發(fā)到單個(gè)輸出線。由于模擬開關(guān)可以雙向傳輸信號(hào)，因此模擬多路復(fù)用器也可用作解復(fù)用器。模擬多路復(fù)用器／解復(fù)用器可用于傳輸模擬和數(shù)字信號(hào)，典型的產(chǎn)品比如<a class="contentlabel" href="http://cafeforensic.com/news/listbylabel/label/東芝"><em>東芝</em></a>的74VHC4051、74VHC4052和74VHC4053。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">模擬開關(guān)</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">在組合邏輯方面還有一個(gè)廣泛應(yīng)用的電路單元：模擬開關(guān)，比如<a class="contentlabel" href="http://cafeforensic.com/news/listbylabel/label/東芝"><em>東芝</em></a>的74VHC4066。模擬開關(guān)可以在任一方向上傳導(dǎo)正弦波信號(hào)等模擬信號(hào)。它在打開時(shí)傳遞信號(hào)，在關(guān)閉時(shí)阻斷信號(hào)。模擬開關(guān)由一對(duì)n溝道和p溝道MOSFET并聯(lián)組成，以降低導(dǎo)通電阻，提高I/O線性特性。模擬開關(guān)的數(shù)據(jù)表顯示了典型的正弦波失真、最大頻率響應(yīng)、饋通衰減、串?dāng)_和其它模擬開關(guān)特性。圖2、圖3和圖4是模擬開關(guān)的邏輯符號(hào)、真值表、時(shí)序圖和邏輯示意圖。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550672..jpg" title="1688550672325668.jpg" alt="25.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖2 模擬開關(guān)的邏輯符號(hào)和真值表</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550664..jpg" title="1688550664346161.jpg" alt="26.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖3 模擬開關(guān)的時(shí)序圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550660..jpg" title="1688550660773368.jpg" alt="27.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖4 模擬開關(guān)的邏輯示意圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">介紹了多個(gè)組合邏輯應(yīng)用之后，我們?cè)賮砜纯磿r(shí)序邏輯的主要應(yīng)用電路單元。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">鎖存器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">首先我們來一起分析一下鎖存器（以東芝的74VHC373為例）。鎖存器可以在特定條件下保留數(shù)據(jù)。鎖存器有D型和RS（復(fù)位和設(shè)置）型等類型。下面將以D型鎖存器為例對(duì)操作進(jìn)行說明。例如，D型鎖存器具有輸入數(shù)據(jù)引腳（D）、鎖存器啟用引腳（LE）和輸出數(shù)據(jù)引腳（Q）。在此例中，當(dāng)LE為低電平時(shí)，Q將保留D的先前值。當(dāng)LE為高電平時(shí)，Q將跟隨D而變化。圖5顯示了D型鎖存器的時(shí)序圖。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550651..jpg" title="1688550651142139.jpg" alt="28.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖5 D型鎖存器的時(shí)序圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">觸發(fā)器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">觸發(fā)器（以東芝的74VHC74為例）是時(shí)序邏輯的另一個(gè)主要電路單元，觸發(fā)器可以在特定條件下保留數(shù)據(jù)?！癴lip-flop”（觸發(fā)器）這個(gè)詞有時(shí)縮寫為FF。觸發(fā)器有D型和JK型等類型。下面將以D型觸發(fā)器為例對(duì)操作進(jìn)行說明。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">D型觸發(fā)器與D型鎖存器的不同之處在于，即使在時(shí)鐘設(shè)置為無效后（在本例中為低電平）之后，D型觸發(fā)器仍保留輸出數(shù)據(jù)（當(dāng)LE輸入為高電平時(shí)，D型鎖存器將數(shù)據(jù)從D輸入端傳輸至Q輸出端）。例如，D型觸發(fā)器具有輸入數(shù)據(jù)引腳（D）、時(shí)鐘引腳（CK）和輸出數(shù)據(jù)引腳（Q）。該觸發(fā)器將輸入數(shù)據(jù)（D）鎖存在CK的上升沿上，并將其傳輸至Q。無論輸入數(shù)據(jù)（D）如何，Q均保持不變，直到CK的下一個(gè)上升沿。換句話說，Q將保留鎖存在CK的前一上升沿上的輸入數(shù)據(jù)（D）。圖6顯示了D型觸發(fā)器的時(shí)序圖。有些觸發(fā)器有一個(gè)清除（CLR）或預(yù)設(shè)（PR）輸入引腳，用于將內(nèi)部狀態(tài)初始化為已知值。觸發(fā)器用于異步信號(hào)的同步器和數(shù)字信號(hào)的延遲電路以及計(jì)數(shù)器、分頻器等。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550643..jpg" title="1688550643820403.jpg" alt="29.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖6 D型觸發(fā)器的時(shí)序圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">我們通過邏輯示意圖（圖7）說明D型觸發(fā)器的操作。D型觸發(fā)器由兩種D型鎖存器組成。當(dāng)時(shí)鐘的上升沿施加到CK時(shí)，D型鎖存器#1被激活。當(dāng)時(shí)鐘（CK）為高電平時(shí)，D型鎖存器#1保持激活狀態(tài)，因此D型鎖存器#2中的第一個(gè)時(shí)鐘反相器也處于激活狀態(tài)。因此，D型鎖存器＃1中保存的數(shù)據(jù)將傳輸?shù)捷敵觯≦），如藍(lán)色箭頭所示。即使輸入更改狀態(tài)，輸出也將保持不變。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">當(dāng)時(shí)鐘下降沿施加到CK時(shí)，D型鎖存器#2被激活。結(jié)果，保存在D型鎖存器＃2中的數(shù)據(jù)將繼續(xù)出現(xiàn)在綠色箭頭高亮顯示的輸出端（Q）。同樣，即使輸入狀態(tài)改變，輸出也保持不變。應(yīng)該注意的是，直到已知輸入在時(shí)鐘（CK）的上升沿被鎖存之前，輸出（Q）的值才是未知的。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550636..jpg" title="1688550636411085.jpg" alt="30.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖7 D型觸發(fā)器邏輯示意圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">計(jì)數(shù)器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">計(jì)數(shù)器（東芝74VHC393，74VHC161）是一種典型的時(shí)序邏輯電路單元，計(jì)數(shù)器在每個(gè)時(shí)鐘（CK）脈沖上按順序進(jìn)行遞增或遞減計(jì)數(shù)。一個(gè)4位計(jì)數(shù)器的模數(shù)可達(dá)16；一個(gè)8位計(jì)數(shù)器的模數(shù)可達(dá)256；一個(gè)14位計(jì)數(shù)器的模數(shù)可達(dá)16384。某些計(jì)數(shù)器具有CLR輸入，用于將內(nèi)部狀態(tài)初始化為已知值。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">計(jì)數(shù)器集成在數(shù)字定時(shí)器、電子計(jì)算器、秒表和許多其它設(shè)備中。計(jì)數(shù)器大致分為異步（紋波進(jìn)位）和同步（并行進(jìn)位）計(jì)數(shù)器。設(shè)單個(gè)觸發(fā)器的傳輸延遲時(shí)間為tpd。然后，n級(jí)異步計(jì)數(shù)器將產(chǎn)生相當(dāng)于n×tpd的大延遲。還應(yīng)注意，當(dāng)計(jì)數(shù)器輸出饋送至邏輯門時(shí)，異步計(jì)數(shù)器可能產(chǎn)生風(fēng)險(xiǎn)。圖8顯示了一個(gè)典型的同步（并行進(jìn)位）計(jì)數(shù)器的時(shí)序圖，它在時(shí)鐘（CK）的每一個(gè)邊沿上按順序進(jìn)行遞增計(jì)數(shù)。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550627..png" title="1688550627131880.png" alt="31.png"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖8</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">移位寄存器</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">移位寄存器（如東芝的74VHC164，74VHC165）可以配置為串行-并行（SI-PO）或并行-串行（PI-SO）轉(zhuǎn)換。并行-串行轉(zhuǎn)換有助于減少傳輸線的數(shù)量（即傳輸位寬度）。某些移位寄存器具有CLR輸入，用于將內(nèi)部狀態(tài)初始化為已知值。移位寄存器由多個(gè)觸發(fā)器組成。圖9通過邏輯示意圖和時(shí)序圖說明移位寄存器的操作。移位寄存器由級(jí)聯(lián)觸發(fā)器組成，其中每個(gè)觸發(fā)器的輸出端（Q）連接至該鏈中下一個(gè)觸發(fā)器的數(shù)據(jù)（D）輸入端。串行輸入（SI）施加至第一觸發(fā)器的數(shù)據(jù)（D）輸入端。來自SI的數(shù)據(jù)在時(shí)鐘（CK）的上升沿被鎖存，并出現(xiàn)在QA處。利用四個(gè)時(shí)鐘脈沖，來自SI的數(shù)據(jù)被傳輸?shù)降谒膫€(gè)觸發(fā)器。結(jié)果，串行輸入（SI）被轉(zhuǎn)換為并行輸出數(shù)據(jù)出現(xiàn)在QD、QC、QB和QA處。</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;"></p><p style="text-align: center;"><img src="https://stockimg.52solution.com/ueditor/php/upload/image/20230705/1688550617..jpg" title="1688550617637590.jpg" alt="32.jpg"/></p><p></p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-align: left; text-indent: 2em;">圖9 移位寄存器（串行輸入，并行輸出）的時(shí)序圖</p><p style="margin-top: 0px; margin-bottom: 0px; padding: 0px; border: none; color: rgb(43, 43, 43); text-wrap: wrap; background-color: rgb(255, 255, 255); text-indent: 2em; text-align: left;">本期芝識(shí)課堂中，我們以典型的幾個(gè)邏輯電路單元來說明組合邏輯和時(shí)序邏輯電路單元是如何進(jìn)行輸入和輸出邏輯轉(zhuǎn)換的，從而了解邏輯IC的各種基礎(chǔ)邏輯知識(shí)，下期芝識(shí)課堂我們將帶大家了解數(shù)據(jù)讀取的相關(guān)知識(shí)，感興趣的話千萬不要錯(cuò)過哦。</p></span>  <div class="6116116" id="coverDiv" class="article_reg" style="width:100%;overflow:hidden;display:none;z-index:10;position:absolute;left:0;background:#fff;"> <center> <img src="https://webstorage.eepw.com.cn/images/display/reg.jpg" border="0" usemap="#Map" /> <map name="Map" id="Map"> <area shape="rect" coords="133,235,319,253" target="_blank" /> <area shape="rect" coords="132,315,319,335" /> </map> </center> </div>  <span id="6611666" class="hAd8"> <br></span>   </div> </article> <div id="6661116" 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